Proprietary Information © 2016 by Mount Technology, Inc. All Rights Reserved.

 MACROprocessor IP

When searching for processor IP to license for your Real-Time Embedded System applications, does your processor requirements have you:

Our MACROprocessor Architecture IP can help you satisfy these types of processor requirements and more. It is smaller with higher compute performance at lower clock speeds and lower power. Ideal for high volume intelligent sensors and heterogeneous multi-core SoCs for IoT and M2M applications.

Scalable and Extensible MACROprocessor Architecture

The MACROprocessor design is based on our Patented Compound Complex Instruction Set Computing Processor architecture. The benefits of our CCISC Architecture is scalable to data bus widths like 8-bit, 16-bit, 24-bit, 32-bit, or other widths, and allows for customization to add or remove processor features and abilities and instructions.

Compute Speed from Architecture

Since our MACROprocessor gets its compute speed from architecture, not high-speed digital circuits, it does not need a high-speed digital semiconductor process when implemented in a device. This means our processor IP can be implemented in older digital and mixed signal semiconductor processes, and it is even conceivable that a MACROprocessor could be implemented in an Analog semiconductor process, along with Sensors and Actuators for a low cost IoT device solution.

Easy to Program

Programming for the MACROprocessor is very easy using our simple programming language with 4 basic, but powerful,

instruction groups:

There are many innovations in our MACROprocessor Architecture… please contact us for more information.


Intellectual Property

Pictured above:  Prototype MACROprocessor routing in a Microsemi (formerly Actel) ProASICPlus FPGA.

Unique Computational Ability with Compound Instructions

The parallel Compound data and the Single Clock nature of a Compound Instruction allows it to perform a complete MACRO operation at the input clock speed, which CISC / RISC processors simply cannot do.

MACRO operation execution at clock speed means the CCISC MACROprocessor has:

The CCISC MP8 MACROprocessor

The MP8 is an 8-bit MACROprocessor Reference Design developed to demonstrate the superior performance of the CCISC Architecture in an 8-bit processor format.

To illustrate the MP8’s performance relative to other 8-bit Processors, we used our MP8 and a single clock 8051 and had them both execute a common computing task to see how they performed.

We used a Bubble Sort routine which consists of indirect addressing modes and a high number of data comparisons, and had the MP8 and the 8051 both execute the task.

The two graphs above show the results of the MP8 and the 8051 running the Sort program task in terms of Execution speed and related Bandwidths.

(Longer Bar is better = Greater Bandwidth)

CCISC MP8 has 5.765x Greater Bandwidth

The graph above left illustrates that the CCISC MP8 completes the Bubble Sort task more than 5X faster than the single clock 8051, with both processors running the same speed.

The graph above right shows that the MP8 executes more than 5X the number of Bubble Sort tasks per second than the 8051, at the same clock speed.

Regarding size, when implemented using a common FPGA device:

(Shorter bar is better = Faster Execution)

CCISC MP8 has 5.765x Faster Execution

Higher performance, same power use case

Note: As a point of computing reference, the 8-bit MP8 MACROprocessor running at same clock speed can: